UVM TLM 내용 정리 하자

UVM TLM 에서는 아래와 같은 지원을 한다.

• TLM1 – The TLM1 ports provide blocking and non-blocking pass-by-value transaction-level interfaces.
• TLM2 – The TLM2 sockets provide blocking and non-blocking transaction-level interfaces with well-defined completion semantics.
• Sequencer Port – A push or pull port, with well-defined completion semantics.
• Analysis – The analysis interface is used to perform non-blocking broadcasts of transactions to connected components

기본 내용에 대해서 정리 한것이다. Put/Get 과 Producer / Initiator 에 대해서 알 수 있다.

About

TLM - transaction level modeling

• Architecture design and performance analysis
• Reference model development
• Function Verfication

TLM API

• Developed by Open SystemC Initiative (OSCI)
• Standardize communication interface between TLM Components
• Allow Plug and Play of TLM components
• UVM Provides a SystemVerilog implementation of the TLM API

Data and Control Flow

Data Flow : A Producer creates data items and a Consumer receives items

Control Flow : The Initiator triggers transaction , target responds

Producer is Target and consumer is initiator

• Pull Mode
• Implemented with get operations

Producer is Initiator and consumer is target

• Push Mode
• Implemented with put operations

Blocking and NonBlocking

데이터를 가져 오기 까지 블록을 시킬지 아니면 그냥 패스 하고 다음꺼 할지 결정 한다.

Blocking

Initiator can suspend execution until data ready

Implemented with get or put tasks

May Block Forever !!

이건 Task 이라서 Task안에서만 사용 해야 한다.

Non-Blocking

Implemented with try_get or try_put functions

These return 0 on Failure , 1 on Success

이건 Function 이라서 Function 구문안에서만 사용해야 한다.

Implementation

Target defines implementation of transaction using specifically named methods

Target declares an imp connector, parameterized for data type ( uvm_get_imp)

Initiator declares a port connector, parameterized for data type(umv_get_port)

the target imp and initiator port objects are connected together at a higher level.

Now the initiator can call the target methods directly via its port instance, and these are mapped to the implementations of the methods defined in the target.

Port and Imp

Imp:

• Used inside target components
• Provides an implementation of the traction method

Port:

• Used inside initiator components
• Provides access to an implementation of the transaction method

Communication Models

The TLM FIFO is a FIFO components wrapped in get and put imp connectors. This has the benefit of data storage as well as providing implementations of the communication methods.

Components connected to the TLM FIFO are in control of data transfer and can simply defined port connectors to initiate read and write operation on the FIFO.

블록킹과 넌블록킹이 있고 write는 브로드 캐스트 할때 쓴다.

About

TLM - transaction level modeling

• Architecture design and performance analysis
• Reference model development
• Function Verfication

TLM API

• Developed by Open SystemC Initiative (OSCI)
• Standardize communication interface between TLM Components
• Allow Plug and Play of TLM components
• UVM Provides a SystemVerilog implementation of the TLM API

Data and Control Flow

Data Flow : A Producer creates data items and a Consumer receives items

Control Flow : The Initiator triggers transaction , target responds

Producer is Target and consumer is initiator

• Pull Mode
• Implemented with get operations

Producer is Initiator and consumer is target

• Push Mode
• Implemented with put operations

Blocking and NonBlocking

데이터를 가져 오기 까지 블록을 시킬지 아니면 그냥 패스 하고 다음꺼 할지 결정 한다.

Blocking

Initiator can suspend execution until data ready

Implemented with get or put tasks

May Block Forever !!

이건 Task 이라서 Task안에서만 사용 해야 한다.

Non-Blocking

Implemented with try_get or try_put functions

These return 0 on Failure , 1 on Success

이건 Function 이라서 Function 구문안에서만 사용해야 한다.

Implementation

Target defines implementation of transaction using specifically named methods

Target declares an imp connector, parameterized for data type ( uvm_get_imp)

Initiator declares a port connector, parameterized for data type(umv_get_port)

the target imp and initiator port objects are connected together at a higher level.

Now the initiator can call the target methods directly via its port instance, and these are mapped to the implementations of the methods defined in the target.

Port and Imp

Imp:

• Used inside target components
• Provides an implementation of the traction method

Port:

• Used inside initiator components
• Provides access to an implementation of the transaction method

Communication Models

The TLM FIFO is a FIFO components wrapped in get and put imp connectors. This has the benefit of data storage as well as providing implementations of the communication methods.

Components connected to the TLM FIFO are in control of data transfer and can simply defined port connectors to initiate read and write operation on the FIFO.

블록킹과 넌블록킹이 있고 write는 브로드 캐스트 할때 쓴다.

About

TLM - transaction level modeling

• Architecture design and performance analysis
• Reference model development
• Function Verfication

TLM API

• Developed by Open SystemC Initiative (OSCI)
• Standardize communication interface between TLM Components
• Allow Plug and Play of TLM components
• UVM Provides a SystemVerilog implementation of the TLM API

Data and Control Flow

Data Flow : A Producer creates data items and a Consumer receives items

Control Flow : The Initiator triggers transaction , target responds

Producer is Target and consumer is initiator

• Pull Mode
• Implemented with get operations

Producer is Initiator and consumer is target

• Push Mode
• Implemented with put operations

Blocking and NonBlocking

데이터를 가져 오기 까지 블록을 시킬지 아니면 그냥 패스 하고 다음꺼 할지 결정 한다.

Blocking

Initiator can suspend execution until data ready

Implemented with get or put tasks

May Block Forever !!

이건 Task 이라서 Task안에서만 사용 해야 한다.

Non-Blocking

Implemented with try_get or try_put functions

These return 0 on Failure , 1 on Success

이건 Function 이라서 Function 구문안에서만 사용해야 한다.

Implementation

Target defines implementation of transaction using specifically named methods

Target declares an imp connector, parameterized for data type ( uvm_get_imp)

Initiator declares a port connector, parameterized for data type(umv_get_port)

the target imp and initiator port objects are connected together at a higher level.

Now the initiator can call the target methods directly via its port instance, and these are mapped to the implementations of the methods defined in the target.

Port and Imp

Imp:

• Used inside target components
• Provides an implementation of the traction method

Port:

• Used inside initiator components
• Provides access to an implementation of the transaction method

Communication Models

The TLM FIFO is a FIFO components wrapped in get and put imp connectors. This has the benefit of data storage as well as providing implementations of the communication methods.

Components connected to the TLM FIFO are in control of data transfer and can simply defined port connectors to initiate read and write operation on the FIFO.

블록킹과 넌블록킹이 있고 write는 브로드 캐스트 할때 쓴다.

About

TLM - transaction level modeling

• Architecture design and performance analysis
• Reference model development
• Function Verfication

TLM API

• Developed by Open SystemC Initiative (OSCI)
• Standardize communication interface between TLM Components
• Allow Plug and Play of TLM components
• UVM Provides a SystemVerilog implementation of the TLM API

Data and Control Flow

Data Flow : A Producer creates data items and a Consumer receives items

Control Flow : The Initiator triggers transaction , target responds

Producer is Target and consumer is initiator

• Pull Mode
• Implemented with get operations

Producer is Initiator and consumer is target

• Push Mode
• Implemented with put operations

Blocking and NonBlocking

데이터를 가져 오기 까지 블록을 시킬지 아니면 그냥 패스 하고 다음꺼 할지 결정 한다.

Blocking

Initiator can suspend execution until data ready

Implemented with get or put tasks

May Block Forever !!

이건 Task 이라서 Task안에서만 사용 해야 한다.

Non-Blocking

Implemented with try_get or try_put functions

These return 0 on Failure , 1 on Success

이건 Function 이라서 Function 구문안에서만 사용해야 한다.

Implementation

Target defines implementation of transaction using specifically named methods

Target declares an imp connector, parameterized for data type ( uvm_get_imp)

Initiator declares a port connector, parameterized for data type(umv_get_port)

the target imp and initiator port objects are connected together at a higher level.

Now the initiator can call the target methods directly via its port instance, and these are mapped to the implementations of the methods defined in the target.

Port and Imp

Imp:

• Used inside target components
• Provides an implementation of the traction method

Port:

• Used inside initiator components
• Provides access to an implementation of the transaction method

Communication Models

The TLM FIFO is a FIFO components wrapped in get and put imp connectors. This has the benefit of data storage as well as providing implementations of the communication methods.

Components connected to the TLM FIFO are in control of data transfer and can simply defined port connectors to initiate read and write operation on the FIFO.

블록킹과 넌블록킹이 있고 write는 브로드 캐스트 할때 쓴다.

About

TLM - transaction level modeling

• Architecture design and performance analysis
• Reference model development
• Function Verfication

TLM API

• Developed by Open SystemC Initiative (OSCI)
• Standardize communication interface between TLM Components
• Allow Plug and Play of TLM components
• UVM Provides a SystemVerilog implementation of the TLM API

Data and Control Flow

Data Flow : A Producer creates data items and a Consumer receives items

Control Flow : The Initiator triggers transaction , target responds

Producer is Target and consumer is initiator

• Pull Mode
• Implemented with get operations

Producer is Initiator and consumer is target

• Push Mode
• Implemented with put operations

Blocking and NonBlocking

데이터를 가져 오기 까지 블록을 시킬지 아니면 그냥 패스 하고 다음꺼 할지 결정 한다.

Blocking

Initiator can suspend execution until data ready

Implemented with get or put tasks

May Block Forever !!

이건 Task 이라서 Task안에서만 사용 해야 한다.

Non-Blocking

Implemented with try_get or try_put functions

These return 0 on Failure , 1 on Success

이건 Function 이라서 Function 구문안에서만 사용해야 한다.

Implementation

Target defines implementation of transaction using specifically named methods

Target declares an imp connector, parameterized for data type ( uvm_get_imp)

Initiator declares a port connector, parameterized for data type(umv_get_port)

the target imp and initiator port objects are connected together at a higher level.

Now the initiator can call the target methods directly via its port instance, and these are mapped to the implementations of the methods defined in the target.

Port and Imp

Imp:

• Used inside target components
• Provides an implementation of the traction method

Port:

• Used inside initiator components
• Provides access to an implementation of the transaction method

Communication Models

The TLM FIFO is a FIFO components wrapped in get and put imp connectors. This has the benefit of data storage as well as providing implementations of the communication methods.

Components connected to the TLM FIFO are in control of data transfer and can simply defined port connectors to initiate read and write operation on the FIFO.

블록킹과 넌블록킹이 있고 write는 브로드 캐스트 할때 쓴다.

Data를 생성하는 Producer 와 소비 하는 Consumer, Control에 따른 Initiator와 Target으로 구분이 되고 Put|Get으로 Controll 한다. TLM 이론을 보면 채널이라는 개념도 있는데 이건 TLM2에 나오는 듯 하다. TLM Analysis 라는 Broadcast 방식의 Put Port가 있으며 모니터에서 사용 하며 Imp 는 Write로 function 이다. 특이하게 Put 쪽은 Blocking 인데 Imp는 Nonblocking 으로 이걸 Fifo에 넣으면 Blocking 으로 사용 할 수 있다.